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| DN8643S 24-bit Shift Register Latch Driver IC s Overview The DN8643S is an IC which incorporates a 24-bit shift register and a latch driver to meet high-speed operation, low power consumption and high-density printout of the thermal printers for the work processors, and so on. It employs the BiCMOS process in which the serial-in and serial-out/parallel-out functions are incorporated, the 24-step shift register block and latch block are composed of CMOS, and the 24-step parallel driver block is bipolar. 1 0.350.25 36 Unit : mm s Features * Serial-in and serial-out/parallel-out * Cascade connection allowed * Built-in output malfunctioning preventive circuit * Low current at stanby ICC=100A * High-breakdown, large current drive type output steps Breakdown : 30V Output current : 120mA * Surface mountable USONF-36D package (pin pitch : 0.8mm) 0.10.1 18 19 1.30.25 2.850.2 0.2 - 0.05 20 36 LD Q Output Malfunction Protector + 0.1 0.5 15.20.3 8.40.3 11.930.3 1.30.25 DQ CP s Block Diagram SIN 17 DQ CP DQ CP DQ CP DQ CP 0.8 36-pin PANAFLAT Plastic Package (SSOP036-P-0450) SOUT CLK STB 18 19 LD Q LD Q LD Q LD Q VCC EN 1 GND 8, 9, 10 27, 28, 29 16 15 14 22 21 Q1 Q2 Q3 Q23 Q24 s Absolute Maximum Ratings (Ta=25C) Parameter Supply voltage Output voltage Output current Power dissipation Operating ambient temperature Storage temperature Symbol VCC VO IO PD Topr Tstg Rating 0 to 7 0 to 30 120 1.3 * -20 to + 75 -55 to + 125 Unit V V mA W C C * When mounting onto the PCB, power dissipation is reduced at a rate of 10.4mW/C from Ta=25C s Recommended Operating Range (Ta=25C) Parameter Supply voltage Output voltage Output current * Clock frequency Input pulse width Setup time Hold time Clock pulse rise time Clock pulse fall time CLK STB SIN STB SIN STB Symbol VCC VO IO fCLK tw tsu th tr tf Input Duty 40 to 60% 40 40 30 40 20 0 500 500 Condition mim 4 typ 5 max 6 30 100 10 Unit V V mA MHz ns ns ns ns ns ns ns ns * An allowable value changes depends on the number of simultaneously turned-on circuits and the duty. Use with power dissipation taken into full account. s Electrical Characteristics (Ta=25C) Parameter Input voltage Input current Output voltage Output current Output saturation voltage Output leakage current Supply current Output malfunctioning preventive circuit operating voltage * VCC VCCT- VCCT+ Symbol VIH VIL IIH IIL VOH VOL IOH IOL VCE (sat) 1 VCE (sat) 2 IOLK1 IOLK2 ICC1 ICC2 VCCT+ VCCT- Condition VCC=4 to 6V VIH=5V VIL=0V IO= -1A IO=1A VOH=4.5V VOL=0.4V IOL=100mA IOL=80mA VO=30V (output OFF) VO=15V (output Off) Total driver output OFF Driver output 1 circuit ON min 0.7VCC 0 typ max VCC 0.3VCC 25 -25 Unit V V A A V V mA mA 4.9 0.1 -4 4 0.4 0.35 50 25 100 5 2.9 2.6 3.9 3.6 V V A A A mA V V * Output malfunctioning preventive circuit operating voltage timing chart Driver output Enable OFF Enable s Switching Characteristics (Ta=25C) Parameter Maximum clock frequency Symbol fmax tPLH tPHL Propagation delay time tPLH tPHL tPLH tPHL Input CLK CLK CLK EN SOUT Qn Qn VCC=5V CL=15pF VCC=5V RL=100 CL=15pF Output Condition min 10 100 100 2 0.5 2 0.5 typ max Unit MHz ns ns s s s s s Timing Chart 1. Input Timing 1/fCLK tWH (CLK) tWL (CLK) CLK 90% 2.5V 10% th (CLK) 2.5V 2.5V 90% 2.5V 10% tf (CLK) 2.5V 2.5V tsu (SIN) th (SIN) SIN STB A.B.C 2.5V tsu (SIN) th (SIN) tsu (STB) th (STB) 2.5V 2.5V tw (STB) 2. Propagation Delay Time CLK 2.5V tPLH 2.5V SOUT 2.5V tPHL 2.5V EN 2.5V tPLH 2.5V Q1 to Q24 tPLH 2.5V tPHL 2.5V 2.5V tPHL 2.5V s Pin Assignments EN Q12 Q11 Q10 Q9 Q8 Q7 GND GND GND Q6 Q5 Q4 Q3 Q2 Q1 SIN CLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 VCC Q13 Q14 Q15 Q16 Q17 Q18 GND GND GND Q19 Q20 Q21 Q22 Q23 Q24 SOUT STB DN8643S 28 27 26 25 24 23 22 21 20 19 (Top View) s Functions Table Input CLK EN H H L L L L STB x x L H H H SIN x x x L H x Ql H H nc H L nc Driver output Qn H H nc Qn-1 Qn-1 nc Q'23 nc Q'23 Q'23 Q'23 nc SOUT Note) H=High level, L=Low level, x = Either "H" or "L" will do, = Transition from "H" or "L" , = Transition from "H" to "L" , nc=No change, Q'23=Status of the 23rd shift register |
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